Silicon RTL Design Engineer

Key responsibilities:Develop and maintain block level RTL IP and MP subsystems’ feature spec, micro-architecture, synthesizable RTL design me ...

For full details including how to apply please visit neuvoo.ca/job.php?id=e07d0c41b3c0&source=madgex_eic&utm_source=partner&utm_medium=madgex_eic&puid=gadb8ddg1db9badcdddgaa9d1dbcedaf3aeegdddeaddcddgaed3fddffdd7ged3ebdbabddfcdc3e (the link will open in a new window)