Standard Cell Engineer

Must have standard cell layout design hands on experience in either of 3nm/5nm/7nm/10nm/14nm FinFET process technologyKnowledge of CMOS semicondu ...

For full details including how to apply please visit neuvoo.ca/job.php?id=f9e02fa5f1a7&source=madgex_eic&utm_source=partner&utm_medium=madgex_eic&puid=gada8dd71abbbddgdddeaa9a1abfedab3aeafddfgadf9dd98ed3fddfbddeeed3gbdbabddfcdc3e (the link will open in a new window)